/*
 * Copyright 2018-2022,2025 NXP.
 *
 * NXP Confidential. This software is owned or controlled by NXP and may only be
 * used strictly in accordance with the applicable license terms. By expressly
 * accepting such terms or by downloading,installing, activating and/or otherwise
 * using the software, you are agreeing that you have read,and that you agree to
 * comply with and are bound by, such license terms. If you do not agree to be
 * bound by the applicable license terms, then you may not retain, install, activate
 * or otherwise use the software.
 *
 */

/**************************************     UCI Packet Format    *****************************************
***********************************************************************************************************
|                         |                       |                               |
|----3----|--1---|---4----|------2----|-----6-----|-----8----|---------8----------|       L bytes
|                         |                       |                               |
-------------------------------------------------------------------------------------------------------------
|    MT   |  PBF |  GID   |     RFU   |    OID    |   RFU    | Payload Length (L) |      Payload
-------------------------------------------------------------------------------------------------------------
|                         |                       |                               |
|       OCTET 0           |      OCTET 1          |          OCTET 2-3            |      OCTET 4 - 4+L

***********************************************************************************************************
***********************************************************************************************************


*********************     UCI Packet Format for Extended Payload  (more than 255 bytes)  *****************
***********************************************************************************************************
|                         |                                           |                               |
|----3----|--1---|---4----|-----------1----------|---1----|-----6-----|-------8--------|------8-------|       L bytes
|                         |                                           |                               |
--------------------------------------------------------------------------------------------------------------------------
|    MT   |  PBF |  GID   |   UCI Extension Bit  |  RFU   |    OID    |  Extended Payload Length (L)  |      Payload
--------------------------------------------------------------------------------------------------------------------------
|                         |                                           |                               |
|       OCTET 0           |                  OCTET 1                  |            OCTET 2-3          |      OCTET 4 -
4+L

***********************************************************************************************************
**********************************************************************************************************/

/*
 * For NON single antenna variant
 */
#ifndef _UWB_DEVICECONFIG_RV4_SR1XX_H_
#define _UWB_DEVICECONFIG_RV4_SR1XX_H_

#include <stdint.h>
#include <uwb_board.h>
#include <phNxpUwbConfig.h>
#include <nxAntennaDefine.h>

/* Set to 0 in case you are using V3 Demonstrators,
 *
 * else set to 1 */
#define USE_NAKED_BOARD 1

/* TX reaming requires only One*/

#define TX_ANTENNA_ENTRIES 0x01
#define RX_ANTENNA_ENTRIES 0x03

#define RX_ANTENNA_PAIR 0x02

/*
 * 0xE4 0x02 : DPD wakeup source : default value : 0x00
 * 0xE4 0x03 : WTX count config : default value : 20 (0x14)
 * 0xE4, 0x34: OEM XTAL start up time/clock request time
 * */

/* clang-format off */
const uint8_t phNxpUciHal_core_configs[] =
{
    0x12, 0x20, 0x04, 0x00, 0x0E, 0x03,
    0xE4, 0x02, 0x01, 0x00,
    0xE4, 0x03, 0x01, 0x14,
    0xE4, 0x34, 0x02, 0xE8, 0x03,
};

#if USE_NAKED_BOARD
#define GROUP_DELAY_CH5 (15078 - 42)
#define GROUP_DELAY_CH9 (15078 - 42)
#else
#define GROUP_DELAY_CH5 (15120)
#define GROUP_DELAY_CH9 (15120)
#endif

const uint8_t phNxpUciHal_rx_antennae_delay_calib_channel5[] =
{
/* Over All Length */ 4 + ( 3 + (1 + 3*AD_N_RX_ENTRIES(3))),
/* Set Calib */ 0x2F, 0x21,
/* Length */ 0,  3 + (1 + 3*AD_N_RX_ENTRIES(3)),
/* Channel */ AD_CALIB_CN(5),
/* GD Calib */ AD_CALIB_CMD_GD,
/* Length */ 1 + 3*AD_N_RX_ENTRIES(3),
/* N Entries */ AD_N_RX_ENTRIES(3),

/* GD Calib: Keep */ AD_RX_ID(1), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Keep */ AD_RX_ID(2), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Keep */ AD_RX_ID(3), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(4), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(5), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(6), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(7), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(8), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(9), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(10), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(11), AD_CALIB_GD(GROUP_DELAY_CH5),
/* GD Calib: Skip */ //  AD_RX_ID(12), AD_CALIB_GD(GROUP_DELAY_CH5),
};
const uint8_t phNxpUciHal_rx_antennae_delay_calib_channel9[] =
{
/* Over All Length */ 4 + ( 3 + (1 + 3*AD_N_RX_ENTRIES(3))),
/* Set Calib */ 0x2F, 0x21,
/* Length */ 0,  3 + (1 + 3*AD_N_RX_ENTRIES(3)),
/* Channel */ AD_CALIB_CN(9),
/* GD Calib */ AD_CALIB_CMD_GD,
/* Length */ 1 + 3*AD_N_RX_ENTRIES(3),
/* N Entries */ AD_N_RX_ENTRIES(3),

  0x01, 0xCA, 0x3A,                                   // RX_ANTENNA:0x01 Murata EVK value
  0x02, 0xCA, 0x3A,                                   // RX_ANTENNA:0x02 Murata EVK value
  0x03, 0xCA, 0x3A,                                   // RX_ANTENNA:0x03 Murata EVK value  
/* GD Calib: Skip */ //  AD_RX_ID(4), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(5), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(6), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(7), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(8), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(9), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(10), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(11), AD_CALIB_GD(GROUP_DELAY_CH9),
/* GD Calib: Skip */ //  AD_RX_ID(12), AD_CALIB_GD(GROUP_DELAY_CH9),
};
const uint8_t phNxpUciHal_core_antennadefs[] =
{
        0x39,
        0x20, 0x04, 0x00, 0x35,
        0x03,                                       // Number of parameters
        0xE4, 0x61, 0x0B, 0x02,                     // ANTENNA_TX_IDX_DEFINE
            0x01, 0x43, 0x00, 0x40, 0x00,           // ID 0x01 - EF1 = 0, EF2 = X, GPIO11 = 1 => Tx - Outdoor R, Type2BP ANT0
            0x02, 0x43, 0x00, 0x00, 0x00,           // ID 0x02 - EF1 = 0, EF2 = X, GPIO11 = 0 => Tx - Indoor, Type2BP ANT0
        0xE4, 0x60, 0x13, 0x03,                     // ANTENNA_RX_IDX_DEFINE
            0x01, 0x01, 0x43, 0x00, 0x00, 0x00,     // ID 0x01 - RX1 - EF1 = X, EF2 = 0, GPIO11 = X => Outdoor L, Type2BP ANT2
            0x02, 0x02, 0x43, 0x00, 0x41, 0x00,     // ID 0x02 - RX2 - EF1 = 1, EF2 = X, GPIO11 = 1 => Outdoor R, Type2BP ANT0
            0x03, 0x02, 0x43, 0x00, 0x01, 0x00,     // ID 0x03 - RX2 - EF1 = 1, EF2 = X, GPIO11 = 0 => Indoor, Type2BP ANT0
        0xE4, 0x62, 0x0D, 0x02,                     // ANTENNAS_RX_PAIR_DEFINE
            0x01, 0x01, 0x02, 0x00, 0x00, 0x00,     // ID 0x01 - RX ID 1 & RX ID 2, Outdoor, Type2BP ANT2 & ANT0
            0x02, 0x01, 0x03, 0x00, 0x00, 0x00      // ID 0x02 - RX ID 1 & RX ID 3, Indoor, Type2BP ANT1 & ANT0
};

const uint8_t phNxpUciHal_rx_pair_1_ch_5_pdoa_calib[] = {
   /* Over All Length */ 4 + (5 + AD_CALIB_LEN_PDOA_CALIB),
   /* Set Calib */ 0x2F, 0x21,    // 0x11 (0001 0001) to be used without UCI Payload Extension and 0x91(1001 0001) to be used with UCI Payload Extension
   /* Length */ 0x00, 5 + AD_CALIB_LEN_PDOA_CALIB,
   /* Channel */ AD_CALIB_CN(5),
   /* pdoa calib */ AD_CALIB_CMD_PDOA_CALIB,
   2 + AD_CALIB_LEN_PDOA_CALIB,
   /* N Entries */ AD_N_PAIR_ENTRIES(1),
   /* RX Pair */ AD_AP_ID(1),
/*Pan -60,        -48,        -36,        -24,        -12,          0,        +12,        +24,        +36,        +48,        +60, */
   0x6F, 0xCE, 0xCD, 0xCE, 0x97, 0xD6, 0x19, 0xE1, 0xDD, 0xEF, 0xF9, 0x00, 0x88, 0x0F, 0x98, 0x1A, 0xC4, 0x24, 0x4C, 0x30, 0x83, 0x37,
   0xAF, 0xD1, 0xE0, 0xCF, 0xC1, 0xD4, 0x7F, 0xDF, 0xB7, 0xED, 0x21, 0xFD, 0x8B, 0x0B, 0xA6, 0x18, 0xED, 0x24, 0x2F, 0x2F, 0x61, 0x35,
   0x7C, 0xD1, 0x31, 0xD2, 0x8A, 0xD6, 0x81, 0xDF, 0xAB, 0xEC, 0x4F, 0xFC, 0x75, 0x0B, 0xC4, 0x18, 0x91, 0x23, 0x54, 0x2C, 0x1E, 0x34,
   0xAE, 0xCF, 0x6D, 0xD3, 0xDE, 0xD9, 0x5F, 0xE2, 0x9C, 0xED, 0xB3, 0xFB, 0xDE, 0x09, 0x63, 0x16, 0x1E, 0x21, 0xCD, 0x2B, 0x48, 0x35,
   0x9A, 0xCD, 0xB0, 0xD2, 0x2C, 0xDA, 0x24, 0xE3, 0xF4, 0xED, 0xDD, 0xFA, 0xCD, 0x08, 0x6C, 0x16, 0xE6, 0x22, 0xA9, 0x2E, 0x78, 0x37,
   0x97, 0xCC, 0xA8, 0xD1, 0xB6, 0xD8, 0x29, 0xE2, 0xB3, 0xEE, 0x89, 0xFE, 0xBE, 0x0E, 0xCB, 0x1C, 0xAC, 0x28, 0x71, 0x32, 0x43, 0x39,
   0xBE, 0xCB, 0xC0, 0xCF, 0xB8, 0xD6, 0x90, 0xE1, 0x13, 0xF1, 0xD4, 0x02, 0x22, 0x12, 0x48, 0x1E, 0xE6, 0x28, 0x1A, 0x32, 0x41, 0x39,
   0xB5, 0xCA, 0x3C, 0xCF, 0xF0, 0xD6, 0x39, 0xE4, 0xAC, 0xF4, 0xEE, 0x03, 0x74, 0x0F, 0xE0, 0x18, 0x4E, 0x23, 0xB2, 0x2F, 0x3A, 0x38,
   0xF0, 0xC7, 0x11, 0xD0, 0x9D, 0xD9, 0x87, 0xE6, 0xB9, 0xF5, 0x1D, 0x03, 0x38, 0x0C, 0xF2, 0x12, 0x64, 0x1C, 0x64, 0x2C, 0x2D, 0x36,
   0xBD, 0xC6, 0x8C, 0xCF, 0x0A, 0xDA, 0x37, 0xE7, 0x1D, 0xF5, 0x3B, 0x02, 0x58, 0x0B, 0x03, 0x10, 0x30, 0x19, 0xF2, 0x25, 0x7C, 0x2F,
   0x3E, 0xC8, 0xBC, 0xCD, 0x5C, 0xD9, 0x56, 0xE7, 0x0C, 0xF3, 0xE8, 0xFF, 0x77, 0x0A, 0xC5, 0x10, 0xDB, 0x17, 0x89, 0x1C, 0xE9, 0x32,
};

const uint8_t phNxpUciHal_rx_pair_1_ch_9_pdoa_calib[] = {
   /* Over All Length */ 4 + (5 + AD_CALIB_LEN_PDOA_CALIB),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 5 + AD_CALIB_LEN_PDOA_CALIB,
   /* Channel */ AD_CALIB_CN(9),
   /* pdoa calib */ AD_CALIB_CMD_PDOA_CALIB,
   2 + AD_CALIB_LEN_PDOA_CALIB,
   /* N Entries */ AD_N_PAIR_ENTRIES(1),
   /* RX Pair */ AD_AP_ID(1),
   /* Pan   -60,        -48,        -36,        -24,        -12,          0,        +12,        +24,        +36,        +48,        +60, */
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E, 
    0xE3, 0xC4, 0xC2, 0xCB, 0xA8, 0xD5, 0xD2, 0xE1, 0xF1, 0xEF, 0x53, 0xFF, 0xC3, 0x0E, 0x43, 0x1D, 0x43, 0x29, 0xE0, 0x32, 0x53, 0x3E
};

const uint8_t phNxpUciHal_rx_pair_2_ch_5_pdoa_calib[] = {
   /* Over All Length */ 4 + (5 + AD_CALIB_LEN_PDOA_CALIB),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 5 + AD_CALIB_LEN_PDOA_CALIB,
   /* Channel */ AD_CALIB_CN(5),
   /* pdoa calib */ AD_CALIB_CMD_PDOA_CALIB,
   2 + AD_CALIB_LEN_PDOA_CALIB,
   /* N Entries */ AD_N_PAIR_ENTRIES(1),
   /* RX Pair */ AD_AP_ID(2),
   /* Tilt -60,        -48,        -36,        -24,        -12,          0,        +12,        +24,        +36,        +48,        +60, */
         0x25, 0xE5, 0x05, 0xE8, 0x9E, 0xEB, 0x0D, 0xF1, 0x66, 0xF7, 0xD4, 0xFD, 0xE1, 0x03, 0xF8, 0x07, 0x79, 0x0A, 0xE6, 0x0F, 0xFB, 0x0E, /* Pan: -60 */
         0xC2, 0xDC, 0x56, 0xDD, 0xE7, 0xE0, 0x58, 0xE8, 0x47, 0xF1, 0x15, 0xFC, 0xD3, 0x05, 0x08, 0x0E, 0xB1, 0x13, 0x56, 0x18, 0xC5, 0x17, /* Pan: -48 */
         0x22, 0xD3, 0x0F, 0xD6, 0xB3, 0xDA, 0x11, 0xE2, 0x6B, 0xEC, 0x7B, 0xFB, 0x82, 0x07, 0x70, 0x11, 0x93, 0x1B, 0xC3, 0x20, 0x3E, 0x21, /* Pan: -36 */
         0xB2, 0xCB, 0xA8, 0xD0, 0x88, 0xD7, 0x5D, 0xDE, 0x01, 0xE9, 0xB2, 0xFB, 0xB6, 0x08, 0x9A, 0x13, 0x42, 0x21, 0xBA, 0x29, 0x10, 0x31, /* Pan: -24 */
         0xD1, 0xC7, 0x17, 0xCD, 0x55, 0xD5, 0x6C, 0xDC, 0xAB, 0xE6, 0x2D, 0xFC, 0x65, 0x0A, 0x23, 0x16, 0x49, 0x25, 0xAF, 0x2F, 0xAA, 0x38, /* Pan: -12 */
         0x3A, 0xC7, 0xF4, 0xCB, 0xBE, 0xD3, 0x70, 0xDB, 0x90, 0xE5, 0xED, 0xFC, 0xA5, 0x0C, 0x88, 0x17, 0x98, 0x26, 0xF1, 0x31, 0xC6, 0x38, /* Pan: 0 */
         0x8E, 0xC8, 0xD1, 0xCC, 0xFA, 0xD3, 0x5B, 0xDB, 0xF7, 0xE5, 0xD5, 0xFD, 0x4F, 0x0E, 0xB1, 0x16, 0x59, 0x24, 0x6E, 0x32, 0x98, 0x35, /* Pan: 12 */
         0x6B, 0xCB, 0x85, 0xCF, 0xC7, 0xD5, 0x64, 0xDC, 0xB6, 0xE7, 0x3A, 0xFE, 0x6C, 0x0E, 0x3F, 0x14, 0x08, 0x1D, 0x92, 0x2B, 0xA8, 0x33, /* Pan: 24 */
         0xB5, 0xCF, 0x64, 0xD3, 0x6D, 0xD8, 0x58, 0xDE, 0xBA, 0xEA, 0xA7, 0xFE, 0xCD, 0x0D, 0xE4, 0x12, 0xD8, 0x14, 0xC7, 0x1D, 0xF3, 0x2E, /* Pan: 36 */
         0xE3, 0xD5, 0xF8, 0xD8, 0x6B, 0xDC, 0xCC, 0xE2, 0xFA, 0xEE, 0x00, 0xFF, 0x6A, 0x0C, 0xAD, 0x13, 0x7D, 0x16, 0x89, 0x18, 0x0C, 0x1C, /* Pan: 48 */
         0x93, 0xDC, 0xB9, 0xDE, 0x2C, 0xE2, 0x0A, 0xE9, 0x18, 0xF3, 0x84, 0xFE, 0x13, 0x09, 0x51, 0x11, 0xCF, 0x17, 0xDE, 0x16, 0xC7, 0x24  /* Pan: 60 */
};

const uint8_t phNxpUciHal_rx_pair_2_ch_9_pdoa_calib[] = {
   /* Over All Length */ 4 + (5 + AD_CALIB_LEN_PDOA_CALIB),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 5 + AD_CALIB_LEN_PDOA_CALIB,
   /* Channel */ AD_CALIB_CN(9),
   /* pdoa calib */ AD_CALIB_CMD_PDOA_CALIB,
   2 + AD_CALIB_LEN_PDOA_CALIB,
   /* N Entries */ AD_N_PAIR_ENTRIES(1),
   /* RX Pair */ AD_AP_ID(2),
   /* Tilt -60,        -48,        -36,        -24,        -12,          0,        +12,        +24,        +36,        +48,        +60, */
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};

const uint8_t phNxpUciHal_pdoa_offset_calib_ch_5[] = {
   /* Over All Length */ (4 + 0x0A),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 0x0A,
   /* Channel */ AD_CALIB_CN(5),
   /* PDOA Offset */ AD_CALIB_CMD_PDOA_OFFSET,
   1 + 3*AD_N_PAIR_ENTRIES(2),
   /* N Entries */ AD_N_PAIR_ENTRIES(2),
   AD_AP_ID(1), AD_CALIB_PDOA_OFFSET(0xDDA3),
   AD_AP_ID(2), AD_CALIB_PDOA_OFFSET(0x41A5)
};

const uint8_t phNxpUciHal_pdoa_offset_calib_ch_9[] = {
   /* Over All Length */ (4 + 0x0A),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 0x0A,
   /* Channel */ AD_CALIB_CN(9),
   /* PDOA Offset */ AD_CALIB_CMD_PDOA_OFFSET,
   1 + 3*AD_N_PAIR_ENTRIES(2),
   /* N Entries */ AD_N_PAIR_ENTRIES(2),
    0x01, 0x74, 0xB2,                                       // RX_ANTENNA_PAIR:0x01
    0x02, 0x00, 0x00                                        // RX_ANTENNA_PAIR:0x02
};

const uint8_t phNxpUciHal_aoa_threshold_pdoa_calib_ch_5[] = {
   /* Over All Length */ (4 + 0x0A),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 0x0A,
   /* Channel */ AD_CALIB_CN(5),
   /* PDOA Offset */ AD_CALIB_CMD_AOA_THRESHOLD_PDOA,
   1 + 3*AD_N_PAIR_ENTRIES(2),
   /* N Entries */ AD_N_PAIR_ENTRIES(2),
   AD_AP_ID(1), AD_CALIB_THRESHOLD_PDOA(0x37A2),
   AD_AP_ID(2), AD_CALIB_THRESHOLD_PDOA(0xE7A6)
};

const uint8_t phNxpUciHal_aoa_threshold_pdoa_calib_ch_9[] = {
   /* Over All Length */ (4 + 0x0A),
   /* Set Calib */ 0x2F, 0x21,
   /* Length */ 0x00, 0x0A,
   /* Channel */ AD_CALIB_CN(9),
   /* PDOA Offset */ AD_CALIB_CMD_AOA_THRESHOLD_PDOA,
   1 + 3*AD_N_PAIR_ENTRIES(2),
   /* N Entries */ AD_N_PAIR_ENTRIES(2),
    0x01, 0x73, 0x0C,                                       // RX_ANTENNA_PAIR:0x01
    0x02, 0x00, 0x5A                                        // RX_ANTENNA_PAIR:0x02
};

/* clang-format on */

const uint8_t phNxpUciHal_NXPCoreConfig1[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig2[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig3[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig4[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig5[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig6[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig7[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig8[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig9[] = {0x00};

const uint8_t phNxpUciHal_NXPCoreConfig10[] = {0x00};

const NxpParam_t phNxpUciHal_NXPConfig[] = {
    /*
     *  Ranging session period: which means, it is the duration of one 1:N
     session and the interval before start of next 1:N session. (1:N ranging
     period + interval between two consecutive  1:N cycles)
        UWB_RANG_SESSION_INTERVAL= (UWB_RANG_CYCLE_INTERVAL * No_of_anchors) +
     IDLE_BEFORE_START_OF_NEXT_1_N Value is in milliseconds This config is valid
     only in 1:N ranging session
     * */
    {UWB_RANG_SESSION_INTERVAL, TYPE_VAL, CONFIG_VAL 2000},
    /*
     *  Application session timeout: How log ranging shall continue.
        value is in milliseconds
        0 value: MW shall configure the value which is passed from application
        Non zero value: MW shall configure timeout with this config value
     provided here
     * */
    {UWB_APP_SESSION_TIMEOUT, TYPE_VAL, CONFIG_VAL 3600000},
    /*
     *  Ranging cycle interval: intreval between two consecutive SS/DS-TWR
     ranging cycle value is in milliseconds 0 value: MW shall configure the
     value which is passed from application Non zero value: MW shall configure
     interval with this config value provided here
     * */
    {UWB_RANG_CYCLE_INTERVAL, TYPE_VAL, CONFIG_VAL 200},
    /*
     *
     *  Timeout value in milliseconds for UWB standby mode.
        The range is between 5000 msec to 20000 msec and zero is to disable
     * */
    {UWB_STANDBY_TIMEOUT_VALUE, TYPE_VAL, CONFIG_VAL 0x00},
    /*
    *FW log level for each above module
     Logging Level Error            0x0001
     Logging Level Warning          0x0002
     Logging Level Timestamp        0x0004
     Logging Level Sequence Number  0x0008
     Logging Level Info-1           0x0010
     Logging Level Info-2           0x0020
     Logging Level Info-3           0x0040
     * */
    {UWB_SET_FW_LOG_LEVEL, TYPE_VAL, CONFIG_VAL 0x003},
    /*
     * Enable/disable to dump FW binary log for different Modules as below
       0x00 for disable the binary log
       Secure Thread      0x01
       Secure ISR         0x02
       Non-Secure ISR     0x04
       Shell Thread       0x08
       PHY Thread         0x10
       Ranging Thread     0x20
     * */
    {UWB_FW_LOG_THREAD_ID, TYPE_VAL, CONFIG_VAL 0x00},
    /*
     * Ranging feature:  Single Sided Two Way Ranging or Double Sided Two Way
     Ranging SS-TWR =0x00 DS-TWR =0x01
     */
    {UWB_MW_RANGING_FEATURE, TYPE_VAL, CONFIG_VAL 0x01},
    {UWB_CORE_CONFIG_PARAM, TYPE_DATA, phNxpUciHal_core_configs},
    /* Core config antennae defines*/
    {UWB_CORE_ANTENNAE_DEFINES, TYPE_DATA, phNxpUciHal_core_antennadefs},
    {UWB_RX_ANTENNAE_DELAY_CALIB_CH5, TYPE_DATA, phNxpUciHal_rx_antennae_delay_calib_channel5},
    {UWB_RX_ANTENNAE_DELAY_CALIB_CH9, TYPE_DATA, phNxpUciHal_rx_antennae_delay_calib_channel9},

    /*
     * Note: If the size of data is greater than 255 bytes, TYPE_EXTENDED_DATA has to be used.
     * TYPE_DATA must only be used when size of array is less than 255 bytes
     *
     * Example if phNxpUciHal_rx_pair_1_ch_5_pdoa_calib data is more than 255 bytes
     * {UWB_AOA_CONFIG_PDOA_CALIB_RXPAIR1_CH5, TYPE_EXTENDED_DATA, phNxpUciHal_rx_pair_1_ch_5_pdoa_calib},
     */
    {UWB_AOA_CONFIG_PDOA_CALIB_RXPAIR1_CH5, TYPE_DATA, phNxpUciHal_rx_pair_1_ch_5_pdoa_calib},
    {UWB_AOA_CONFIG_PDOA_CALIB_RXPAIR1_CH9, TYPE_DATA, phNxpUciHal_rx_pair_1_ch_9_pdoa_calib},
    {UWB_AOA_CONFIG_PDOA_CALIB_RXPAIR2_CH5, TYPE_DATA, phNxpUciHal_rx_pair_2_ch_5_pdoa_calib},
    {UWB_AOA_CONFIG_PDOA_CALIB_RXPAIR2_CH9, TYPE_DATA, phNxpUciHal_rx_pair_2_ch_9_pdoa_calib},
    {UWB_AOA_CONFIG_PDOA_OFFSET_CH5, TYPE_DATA, phNxpUciHal_pdoa_offset_calib_ch_5},
    {UWB_AOA_CONFIG_PDOA_OFFSET_CH9, TYPE_DATA, phNxpUciHal_pdoa_offset_calib_ch_9},
    {UWB_AOA_CONFIG_THRESHOLD_PDOA_CH5, TYPE_DATA, phNxpUciHal_aoa_threshold_pdoa_calib_ch_5},
    {UWB_AOA_CONFIG_THRESHOLD_PDOA_CH9, TYPE_DATA, phNxpUciHal_aoa_threshold_pdoa_calib_ch_9},
    {UWB_AOA_CONFIG_BLOCK_COUNT, TYPE_VAL, CONFIG_VAL 8},
    /* Timeout for Firmware to enter DPD mode
     * Note: value set for UWB_DPD_ENTRY_TIMEOUT shall be in MilliSeconds.
     * Min : 100ms
     * Max : 2000ms */
    {UWB_DPD_ENTRY_TIMEOUT, TYPE_VAL, CONFIG_VAL 500},
    /* 0x00 = FIRA generic notifications (Default)
     * 0x01 = Vendor extended notifications
     * UWBS shall send any proprietary information in any response/notification
     * if NXP_EXTENDED_NTF_CONFIG is set 0x01 */
    {UWB_NXP_EXTENDED_NTF_CONFIG, TYPE_VAL, CONFIG_VAL 0x01},
    /* Firmware Low Power Mode
     * if UWB_LOW_POWER_MODE is 0, Firmware is Configured in non Low Power Mode
     * if UWB_LOW_POWER_MODE in 1, Firmware is Configured with Low Power Mode */
    {UWB_LOW_POWER_MODE, TYPE_VAL, CONFIG_VAL 0x01},

    {UWB_NXP_CORE_CONFIG_BLOCK_1, TYPE_DATA, phNxpUciHal_NXPCoreConfig1},
    {UWB_NXP_CORE_CONFIG_BLOCK_2, TYPE_DATA, phNxpUciHal_NXPCoreConfig2},
    {UWB_NXP_CORE_CONFIG_BLOCK_3, TYPE_DATA, phNxpUciHal_NXPCoreConfig3},
    {UWB_NXP_CORE_CONFIG_BLOCK_4, TYPE_DATA, phNxpUciHal_NXPCoreConfig4},
    {UWB_NXP_CORE_CONFIG_BLOCK_5, TYPE_DATA, phNxpUciHal_NXPCoreConfig5},
    {UWB_NXP_CORE_CONFIG_BLOCK_6, TYPE_DATA, phNxpUciHal_NXPCoreConfig6},
    {UWB_NXP_CORE_CONFIG_BLOCK_7, TYPE_DATA, phNxpUciHal_NXPCoreConfig7},
    {UWB_NXP_CORE_CONFIG_BLOCK_8, TYPE_DATA, phNxpUciHal_NXPCoreConfig8},
    {UWB_NXP_CORE_CONFIG_BLOCK_9, TYPE_DATA, phNxpUciHal_NXPCoreConfig9},
    {UWB_NXP_CORE_CONFIG_BLOCK_10, TYPE_DATA, phNxpUciHal_NXPCoreConfig10},

    /* Number of UWB_NXP_CORE_CONFIG_BLOCKS available in the config file */
    {UWB_NXP_CORE_CONFIG_BLOCK_COUNT, TYPE_VAL, CONFIG_VAL 10}};

#endif //_UWB_DEVICECONFIG_RV4_SR1XX_H_
